So far, all the basic circuits I've mentioned have had no "memory." In order to make the flip-flops and other memory elements needed, we employ a little bit of positive feedback.
Here is a high-level schematic of a simple D-flip-flop:
The boxes with the lines in the center are called "transmission gates." They are composed of one PMOS and one NMOS in parallel. Notice that the inverted vesion of every signal that goes to transmission gate has the inverted version as well. That is because one is needed for the PMOS and the other for the NMOS.
There are two distiguishable states, "transparent" and "opaque." In the transparent state, the drains and sources are electrically connected. In the opaque state, the drains are elecrically issolated from the sources.
The end result is that the D input passes to the output when the CLK signal transitions from high to low. At all other times, there are positive feedback mechanisms that keep the output at the value it was last.
Please see if you can see this function from the confuguration.
Hint:The flip-flop is actually composed of two "latches." Each with its own set of tranmission gates and and feedback loop that are opaque or transparent based on the level
of the clock.
I really suggest you spend some time puzzling out the basic circuits to see how they create the functions describes. I will answer questions if you get stuck. Once done, I dare say, you will have a much more knowledge than even "lay-people" even in other technichal fields (that is other than Electrical/Computer Engineering or Science).