[ygolo]

Originally Posted by Athenian200

That's an interesting explanation of how a processor distinguishes 1 from 0 meaningfully... I always wondered how it did that.

Perhaps its a bit philosophical, but I don't believe the processors really distiguish between 1's and 0's. The processor designers do. The processor simply does what it was designed to.

You know, in retrospect, the reason I gave you for the use of two types of transistors was misleading. You could replace all the PMOS transistors in a basic CMOS circuit with a single resistor (though it would no longer be a CMOS, but an NMOS circuit). Basically the resistor would pull the output node-up whenever the NMOS circuit didn't pull it down (the NMOS circuit would have to be stronger than the resistor, since the resistor is always pulling up). CMOS has MUCH lower power dissipation because once the output switches, no more current is needed till the next time the output changes.

You could alternatively use NMOS where the PMOS were and feed the PMOS-replacement NMOS transistors with inverted signals. But here, the voltage would never get pulled all the way up to Vdd, and the PMOS-replacement NMOS's would have to keep sinking current even after the switch from ground to Vdd-Vth (where Vth is the threshold voltage).

This is a more complicated story (if you don't understand it, then just ignore it). But explaining "why" we design things in certain ways is always complicated because there are many alternatives, and reasons for not using them.

Originally Posted by Athenian200

That would screw up the whole circuit. It looks like they don't know how to account for the quantum level yet, or if they can compensate for what happens there.

The leakage currents are small (like 8-10 orders of magnitude smaller than normal dynamic currents). Although leakage has increasingly become problematic, they are more of an issue for the functionality of Analog circuits. For digital circuits, because it is always there, burning power, even when the circuits aren't switching.

Originally Posted by Athenian200

But if someone were trying to make a processor with the bare minimum of components, that might be done? In other words, if space and component cost became the primary issue instead of speed?

You could certainly make a NAND gate based processor. But there are area and power reasons for not doing this also. Also, a lot of the input output circuits are analog in nature, because the Printed Circuit Board traces (used to connect the chips together) behave like little transmission lines even in MHz ranges.

Besides, integrated circuits can integrate a LOT. If you have a design which has its area limited by the number of pins that connect the processor to other circuits instead of the size of the circuits themselves, you are wasting die-area (which is directly related to cost).

Originally Posted by Athenian200

Ah, that's what I was missing. The black ones with vertical lines allow pass-through when CL# is high and CL is low (one state of the clock cycle), and the ones with horizontal colored lines allow pass-through when CL# is low and CL is high. When one is in the opposite state, the inverters hold it in the feedback loop until the clock cycles.

Originally Posted by Athenian200

Yeah, it looks like we might be reaching the point where more speed is no longer worth the power cost.

Glad to see things are making sense, now.